1. Field of the Invention
The invention relates in general to a reading method, and is more particularly capable of compensating the source-side loading effect in a memory.
2. Description of the Related Art
Referring to FIG. 1, a circuit diagram of a NOR type flash memory array is shown. The flash memory array 1 includes numerous flash memory cells, each of which includes a metal oxide semiconductor (MOS) transistor, arranged in rows and columns. In an example, those memory cells are arranged in M×N matrix, wherein M and N are natural numbers.
Memory cells on a same cell rows have gates connected to a corresponding word line among the WL1 to WLM, drains connected to the respective N bit lines BL1 to BLN, and sources connected to a corresponding source line among M source lines SL1 to SLM. When memory cells on each cell rows are read, the memory cells is driven by signals on the corresponding word lines WL1 to WLM and bit lines BL1 to BLN to provide output currents on the corresponding source lines SL1 to SLM. The source lines SL1 to SLM respectively have sensing nodes 131 to 131M, at which corresponding output currents are sensed to determine the data values stored in the corresponding memory cells.
Conventionally, the source lines SL1 to SLM are formed by implantation on silicon, which is a material with high unit resistance value. In an example, a segment of source line between any two neighboring bit lines associated with a unit source side resistance Rs. Thus, the source side loading effect will occurs at the conventional flash memory circuit 1 to lift up the source voltage of memory cells, cause variation in the threshold voltages of each memory cells and the sensed output current, and lead to faulty reading operation. In some cases, the source side loading effect can even causes the over-erasure situation to make memory cells over-erased due to the misjudgment of the varied sensed output current.
At some extremely operation example, such as page read operation, the current flowed on the source line is even higher than that in normal read operation. For example in page read operation, at least 64 sense amplifiers are used at the same time, but in normal read, 16 amplifiers are used. Thus, the source side loading effect will become even worse to cause permanent damage on the memory circuit. Therefore, how to determine a reading method to ease the source side loading effect has became a prominent goal to achieve.